"XNOR 게이트"의 두 판 사이의 차이

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===소스===
 
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==메타데이터==
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===위키데이터===
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* ID :  [https://www.wikidata.org/wiki/Q1336142 Q1336142]
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===Spacy 패턴 목록===
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* [{'LOWER': 'xnor'}, {'LEMMA': 'gate'}]

2021년 2월 17일 (수) 01:22 기준 최신판

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말뭉치

  1. If we consider the expression ( A + B ¯ ) ⋅ ( A ¯ + B ) {\displaystyle (A+{\overline {B}})\cdot ({\overline {A}}+B)} , we can construct an XNOR gate circuit directly using AND, OR and NOT gates.[1]
  2. An XNOR gate circuit can be made from four NOR gates.[1]
  3. The symbol of the XNOR gate is the same as XOR, only complement sign is added.[2]
  4. Sometimes, the XNOR gate is also called the Equivalence gate.[2]
  5. The main disadvantage of this implementation is that we use different types of gates to form a single XNOR gate.[2]
  6. The XNOR gate (also known as a XORN’T, ENOR, EXNOR or NXOR) – and pronounced as Exclusive NOR – is a digital logic gate whose function is the logical complement of the exclusive OR gate (XOR gate).[3]
  7. The outcome of our study shows that the all-optical XNOR gate is indeed feasible with the proposed scheme at 250 Gb/s with both logical correctness and acceptable quality.[4]
  8. An XNOR gate (sometimes referred to by its extended name, Exclusive NOR gate) is a digital logic gate with two or more inputs and one output that performs logical equality.[5]
  9. An XNOR Gate is a type of digital logic gate that receives two inputs and produces one output.[6]
  10. The XOR gate has a lesser-known cousin called the XNOR gate.[7]
  11. Figure 2 shows the operating principle of a passive ultrafast XNOR gate based on frequency-domain, passive NOT operation.[8]
  12. The conceptual understanding of the frequency-domain passive XNOR gate is similar to that of the proposed NOT gate.[8]
  13. 2: The operation principle of the proposed frequency-domain zero switching-energy logic XNOR gate.[8]
  14. our XNOR gate produces bipolar outputs such that three levels are allowed: “−2,” “0,” and “2” (see the truth table in Fig.[8]
  15. QCA XNOR gate is proposed in this letter and the reliability, AVG Energy Dissipation of Circuit (AVG EDC) of it have been analyzed.[9]
  16. Multi-bit comparators have been implemented with preferable XNOR gate proposed in this letter and they have lower complexity and Efficient Complexity than previous ones.[9]
  17. XOR and XNOR gate symbols are shown below in Fig.[10]
  18. The circuit diagram symbol for an XNOR gate is illustrated above, and the XNOR truth table is given below for two arguments.[11]
  19. All-optical logic XNOR gate is realized by a series combination of XOR and INVERT gates.[12]
  20. The outcome of this study shows that the all-optical XNOR gate is indeed feasible with the proposed scheme at 250 Gb/s with both logical correctness and acceptable quality.[12]
  21. XNOR gate can have two or more than two inputs but it has only one output.[13]
  22. Discrete XNOR gate can be made with MOSFET and diodes.[13]

소스

메타데이터

위키데이터

Spacy 패턴 목록

  • [{'LOWER': 'xnor'}, {'LEMMA': 'gate'}]